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    Wafer load grid architect EUV Wafer clamping Job in Veldhoven, Netherlands

    ASML is one of the world’s leading manufacturers of chip-making equipment.

    Our vision is to enable affordable microelectronics that improve the quality of life. To achieve this, our mission is to invent, develop, manufacture and service advanced technology for high-tech lithography, metrology and software solutions for the semiconductor industry.

    ASML's guiding principle is continuing Moore's Law towards ever smaller, cheaper, more powerful and energy-efficient semiconductors. This results in increasingly powerful and capable electronics that enable the world to progress within a multitude of fields, including healthcare, technology, communications, energy, mobility, and entertainment.

    Working at ASML
    We provide the world’s top chipmakers everything they need to create better performing, cheaper semiconductor chips. Simply put: we are an industry leader supporting industry leaders.

    As such, you’ll be encouraged to bring your best ideas and act on them. You’ll have the freedom, trust, and support in your field to experiment and solve complex challenges. Things are rarely dull when you’re constantly breaking new ground.

    But despite our fast-paced environment at the forefront of tech, we take your work-life balance and wellbeing seriously. A business is only as good as its employees.

    So join us, and you’ll be a part of a global collaboration. One that promotes creativity, the inclusion of highly diverse teams, and an exciting and dynamic work environment. Join us, and you’ll be a part of progress.

    Wafer load grid architect EUV Wafer clamping Job Description

    Introduction
    Are you energized by being the technical motor for the development of our electrostatic clamps?  Are you able to play with the different disciplines that come together in these products and often lead to very challenging and complex technical puzzles? If so, then we can offer you an attractive position as clamps architect in our group.  As our electrostatic clamps actually hold our customers product, the wafer, you can truly make the difference! A great opportunity for your professional and personal growth.

    Job Mission
    As an ASML clamps architect you drive the development of electrostatic clamps that are used in the wafer handler and wafer stage. You will be a key player in a fast-paced, multi-disciplinary environment.  Focus of the job is on the wafer load grid performance of the wafer clamp: the complex behavior how the wafer deforms when being clamped on our electrostatic clamp.  The ultimate goal is to fully understand the this behavior. Together with specialists on overlay, metrology, mechanics and tribology you analyze the behavior of our clamps. By using experimental and numerical techniques you will be able to understand and predict the wafer load grid performance of the clamp. You will present your findings and results to management and are the driving force behind the long term direction on this topic.Finally you get the chance and you are encouraged to integrate with the dynamic and diverse ASML community.

    Job Description

    • The main responsibilities of a clamps architect consist of;
    • Requirements engineering: translate system requirements into clamp requirements
    • Generate and verify solutions: generate and define solutions that realize the specified requirements on both performance and industrialization aspects. You drive verification of the proposed solutions by testing and modelling.
    • Contribution to the clamps roadmap: you generate solutions that increase customer value.
    • Interfacing with other projects and suppliers: you guard the technical interfaces between the clamps project and interfacing projects like wafer stage and wafer handler. You closely interact with clamp manufacturers in Germany and USA.
    • Communication and stakeholder management: you present technical progress in a clear way to the team and stakeholders. You drive consensus for technical decisions.
    • Risk management: You take care of pro-active risk management by  conducting FMEAs and maintaining IRRs (Issue Risk Register). You focus on mitigation of the most important risks and escalate to management when needed.
    • Issue solving: assist in analyzing and solving complex clamp related issues in the EUV scanner and at our suppliers in a structured way

    Wafer load grid architect EUV Wafer clamping Job Requirements

    Education
    Master Degree, or PhD in (Applied) Physics, Tribology, Mechanical Engineering, or Mathematics

    Experience

    • 5+ year experience in an industrial environment with high tech products and complex production processes in multi-disciplinary projects.
    • 2+ year experience as technical architect, system designer or similar function.
    Personal skills
    • Self-propelling: act pro-active, take initiative and always act to the greater good of the product such that they serve our customer needs.
    • Excellent (English) communication skills in speech and writing for technical and managerial interaction
    • Solid technical background on multiple technical disciplines and excellent analytical skills
    • Strong social and communication skills to build lasting relations and lead technical teams
    • Drive for quality
    • Balancing all the requirements, including industrialization, in the design and consider time and development costs to achieve these, as your second nature.
    Context of the position
    Within ASML, the sector EUV is responsible for the development of ASML EUV scanner and source. The wafer clamping group is responsible to develop and deliver qualified electrostatic clamps which clamp the wafer in the wafer handler and the wafer stage. Wafer clamps are crucial to make lithography happen against the ever demanding specs on overlay, focus, defectivity and throughput while ensuring high availability.  The holder of this position reports to the Group lead EUV DE WCP Wafer Clamping and is operational within multidisciplinary projects.
     

    Wafer load grid architect EUV Wafer clamping Application Information

    Please apply with your CV and cover letter by the 'apply' button below

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    Wafer load grid architect EUV Wafer clamping Summary

    Education Backgrounds: Mathematics
    Mechanical Engineering
    Physics
    Specialties: Manufacturing
    Mathematics
    Mechanics
    Mechatronics
    Education Level: Postgraduate (Masters)
    Doctorate (PH.D)
    Experience: 10 - 15 years
    5 - 10 Years
    > 15 years
    Languages spoken: English
    Job Location: Veldhoven, Netherlands
    Keywords: Physics, Tribology, mechanical engineering, mathematics, pro-active, excellent, solid,

    Apply

    ASML

    Veldhoven, Netherlands
    HR Department
    View Company Profile More Jobs with

    Type: Job

    Deadline: 28th March 2024

    Job reference (ID): 14891

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