Final Thesis within Engineering Internship in Munich, Germany

Airbus Defence and Space is a division of Airbus Group formed by combining the business activities of Cassidian, Astrium and Airbus Military. The new division is Europe's number one defence and space enterprise, the second largest space business worldwide and among the top ten global defence enterprises. It employs some 40,000 employees generating revenues of approximately €14 billion per year

Final Thesis within Engineering Job Description

Are you looking for a final year project? Would you like to discover the work of a Development Engineer? Then apply now! We look forward to you joining us at the Engineering/Design & Development department in Ottobrunn/Munich from March 2015 for 5-6 months.
 
You will write your final thesis in the Engineering/Design & Development department which is involved in the development of onboard Field Programmable Gate Array (FPGA)/Application Specific Integrated Circuit (ASIC) logic and processor solutions for satellite subsystems and scientific instruments. In the scope of these projects, data processing units (based on digital signal processors) were developed for various missions like Rosetta and Venus Express. However the increasing algorithmic and processing requirements for data generated by onboard instruments require high performance and flexible hardware. The solution to these important requirements is the use of next generation FPGA technology, suitable for use in space.
 
In this study, the ease of implementation of typical space application functions on the new generation FPGA technology has to be investigated. In particular, basic building blocks like medium to high speed serial interfaces or basic processor models will be investigated. The provided development kit includes an evaluation board and a suite of software tools: simulator, synthesis and place & route tools.
 
Your role will involve the following exciting topics:
 
- Implementation of various test designs into the target technology (partly based on available function blocks: SpaceWire, double data rate (DDR2/3) memory interface, high speed serial links (up to 3.25 Gbit/s), general purpose input/output, phase-locked loop (PLL) and Error Detection and Correction (EDAC) protected internal memory
- Functional test with the target device on a development board
- Measurement of various electrical parameters of the external interfaces
- Documentation of the results

Final Thesis within Engineering Job Requirements

Profile:

You offer:
- Enrolled student within Electrical Engineering, Informatics, Telecommunication Engineering or similar field of study
- Good experience in VHDL as well as experience/interest in embedded programming and/or in areas of programming close to hardware level are desirable
- English: advanced level
- German: beginner level

You are a good team player, have excellent communication skills and you are able to work independently.

 

Final Thesis within Engineering Application Information

Does this job description fit your objectives and profile? Take the next step in your career and come and join us! Please apply online, providing all of your application documents (cover letter, C.V., relevant certificates, current certificate of enrolment), by the 'apply' button below, specifying the reference number 10267792.
 
The Airbus Group is committed to achieving workforce diversity and creating an inclusive working environment. We welcome all applications irrespective of social and cultural background, age, gender, disability, sexual orientation or religious belief.
 
Remember - you found this opportunity on Qreer.com

Final Thesis within Engineering Summary

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